Capability-based addressing is a memory access technique that can be used to control access to memory within a computing system. In capability-based addressing, pointers are replaced by objects referred to as capabilities, which include some set of restrictions on the type of memory accesses that can be performed using the capability object, enabling the processor or kernel to control which processes may access which objects in memory. CHERI (Capability Hardware Enhanced RISC Instructions) is an extension of RISC Instruction Set Architectures (ISAs) to enable capability-based primitives. However, capability enhanced RISC ISAs known in the art make use of large pointers that can result in object file sizes that may be impractical for general-purpose use, particularly in mobile or handheld computing devices in which storage device and memory capacity may be constrained.